Difference between revisions of "Netgear WNCE2001"

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m (Created page with 'Category:Engineering Netgear Universal WiFi Internet Adapter (WNCE2001 Rev A1). Chipset: Ralink RT3052F. The RT3052 SoC combines Ralink’s 802.11n draft compliant 2T2R 300M…')
 
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[[Category:Engineering]]
 
[[Category:Engineering]]
Netgear Universal WiFi Internet Adapter (WNCE2001 Rev A1).
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= Netgear Universal WiFi Internet Adapter WNCE2001 Rev A1 =
  
 
Chipset: Ralink RT3052F. The RT3052 SoC combines Ralink’s 802.11n draft compliant 2T2R 300Mbps PHY data rate MAC/BBP/RF, a high performance 384MHz MIPS24KEc CPU core,  1T1R/1T2R/2T2R/2T3R modes 5-port integrated 10/100 Ethernet switch/PHY, a USB OTG and a Package: 14mm X 14mm 289-ball BGA Gigabit Ethernet MAC.
 
Chipset: Ralink RT3052F. The RT3052 SoC combines Ralink’s 802.11n draft compliant 2T2R 300Mbps PHY data rate MAC/BBP/RF, a high performance 384MHz MIPS24KEc CPU core,  1T1R/1T2R/2T2R/2T3R modes 5-port integrated 10/100 Ethernet switch/PHY, a USB OTG and a Package: 14mm X 14mm 289-ball BGA Gigabit Ethernet MAC.
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Memory: ESMT M12L2561616A-6T. The M12L2561616A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 16 bits. AZK1P00EB
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Flash: MX25L3205D - Macronix International 32 Mbit CMOS serial flash memory. 4194304 x 8 bits internally (4d MByte). SPI interface in Mode 0 and Mode 3.

Latest revision as of 00:43, 28 July 2010

Netgear Universal WiFi Internet Adapter WNCE2001 Rev A1

Chipset: Ralink RT3052F. The RT3052 SoC combines Ralink’s 802.11n draft compliant 2T2R 300Mbps PHY data rate MAC/BBP/RF, a high performance 384MHz MIPS24KEc CPU core, 1T1R/1T2R/2T2R/2T3R modes 5-port integrated 10/100 Ethernet switch/PHY, a USB OTG and a Package: 14mm X 14mm 289-ball BGA Gigabit Ethernet MAC.

Memory: ESMT M12L2561616A-6T. The M12L2561616A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 16 bits. AZK1P00EB

Flash: MX25L3205D - Macronix International 32 Mbit CMOS serial flash memory. 4194304 x 8 bits internally (4d MByte). SPI interface in Mode 0 and Mode 3.